2006-02-28

 

alphaWorks : IBM Full-System Simulator for the Cell Broadband Engine Processor : Overview

alphaWorks : IBM Full-System Simulator for the Cell Broadband Engine Processor : Overview

What is the Full-System Simulator for the Cell Broadband Engine (Cell BE) Processor?

In 2001, Sony, Toshiba, and IBM combined research and development efforts to create an advanced processor and system architecture for a new wave of devices in the emerging broadband era. As a result, the Cell Broadband Engine Architecture (CBEA) was designed in order to take advantage of IBM's most advanced semiconductor process technologies and to deliver high performance with good power efficiency.

Shortly after project inception, Sony, Toshiba, and IBM engaged the IBM Austin Research Laboratory to develop an IBM Full-System Simulator model for the processor and system architecture that would support software simulation and performance testing. Internally referred to as "Mambo," the simulator delivered vital feedback at various stages of the Cell BE project life cycle. An initial, functional simulation model was developed based on design specifications for preliminary validation, then validated against hardware-level simulators, and finally correlated with real hardware. The result was a completely integrated working system of Cell BE hardware and software that has been successfully launched alongside actual hardware delivery. The IBM Full-System Simulator for the Cell BE Processor enables development teams both within and outside IBM to simulate a Cell BE system in order to develop and enhance application support for this platform.

How does it work?

Written in C, a significant part of the Full-System Simulator's simulation capability is directly attributed to its simulation multitasking framework component. Developed as a robust, high-performance alternative to conventional process and thread programming, the multitasking framework is a lightweight, multitasking scheduling framework that provides a complete set of facilities for creating and scheduling threads, manipulating time delays, and applying a variety of interthread communication policies and mechanisms to simulation events.

In the multitasking framework's multithreaded approach, individually-schedulable threads are created in order to simulate a component or collection of components. If a thread must defer processing, it requests to be blocked and continues execution when awakened. Any local (stack) state is preserved in order to mitigate the necessity for allocating areas for saving and restoring this state. Multitasking framework threads are non-preemptive; they block only on well-defined events. The multitasking framework simplifies access to shared data that must otherwise be serialized in order to guarantee correct behavior. Each thread has an associated priority. Scheduling and resource allocations are all "first-come, first-served" (FCFS) within priority. The multitasking framework also includes software components useful for modeling common hardware components such as gates, latches, and ports.

This low-level simulation infrastructure is complemented with a host of additional features, such as integrated development and debugging tools, support for stand-alone and operating system boot, data collection and analysis frameworks, performance visualization, and tracing and logging capabilities that enable developers to realistically represent an entire system of equipment, devices, or subsystems and simulate not only the instructions executed by the processor core, but also its interactions with its surrounding system components. Additionally, the Full-System Simulator is capable of booting K42, IBM's research operating system, and rHype, the research hypervisor.


Comments: Post a Comment

<< Home

This page is powered by Blogger. Isn't yours?